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All-optical routers modeled through the matrix method with NVidia CUDA development framework
| dc.contributor.author | Zabala-Blanco, David | |
| dc.contributor.author | Azurdia-Meza, Cesar A. | |
| dc.contributor.author | Dehghan Firoozabadi, Ali | |
| dc.contributor.author | Palacios Játiva, Pablo | |
| dc.date.accessioned | 2023-01-23T17:58:23Z | |
| dc.date.available | 2023-01-23T17:58:23Z | |
| dc.date.issued | 2019 | |
| dc.identifier.uri | http://repositorio.ucm.cl/handle/ucm/4425 | |
| dc.description.abstract | Optical packet switching (OPS) is a promising technology in order to satisfy the ever-increasing need for bandwidth. With this technology, data packets, which consist of a header and a payload, are assembled and transmitted over a wavelength division multiplexing network. Headers are processed electronically in the routers that comprise the network. This processing must be carried out as quickly and efficiently as possible in order to avoid packet loss. On the other hand, parallel computing has recently been extended and popularized thanks to the NVidia compute unified device architecture (CUDA) development framework. In this programming paradigm, several threads run the same code simultaneously in order to reduce the overall processing time. This work shows that an optical routing algorithm for OPS can perform better under parallel execution, depending on the amount of data to be processed. A routing method based on simple matrices is presented, and the computation time between a traditional sequential programming languages (C++), and CUDA C is presented. Other performance metrics related to the router dimensioning are also considered. | es_CL |
| dc.language.iso | en | es_CL |
| dc.rights | Atribución-NoComercial-SinDerivadas 3.0 Chile | * |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/cl/ | * |
| dc.source | IEEE CHILEAN Conference on Electrical, Electronics Engineering, Information and Communication Technologies, 2019, 8987659 | es_CL |
| dc.subject | Compute unified device architecture | es_CL |
| dc.subject | Optical packet switching | es_CL |
| dc.subject | Serial and parallel computation | es_CL |
| dc.subject | Wavelength division multiplexing | es_CL |
| dc.title | All-optical routers modeled through the matrix method with NVidia CUDA development framework | es_CL |
| dc.type | Article | es_CL |
| dc.ucm.facultad | Facultad de Ciencias de la Ingeniería | es_CL |
| dc.ucm.indexacion | Scopus | es_CL |
| dc.ucm.uri | ieeexplore.ieee.org/document/8987659 | es_CL |
| dc.ucm.doi | doi.org/10.1109/CHILECON47746.2019.8987659 | es_CL |
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